Semiconductor Engineering9h
Research Bits: Dec. 3
Researchers from North Carolina State University and Iowa State University demonstrated a technique for self-assembling ...
Semiconductor Engineering45m
Chip Companies Play Bigger Role In Shaping University Curricula
Design and AI companies are using a range of tools to help graduates become productive more quickly. Some are feeding their ...
Semiconductor Engineering9h
Chiplet-Based NPUs to Accelerate Vehicular AI Perception Workloads
A new technical paper titled “Performance Implications of Multi-Chiplet Neural Processing Units on Autonomous Driving ...
Semiconductor Engineering6d
Aging, Complexity, And AI In Analog Design
Where digital and analog designs are overlapping, and why it's becoming more difficult to ensure they work as expected over ...
Semiconductor Engineering5d
STCO for Dense Edge Architectures using 3D Integration and NVM (imec,, et al.)
Technology Co-Optimization for Dense Edge Architectures using 3D Integration and Non-Volatile Memory” was published by ...
Semiconductor Engineering6d
Pooling CPU Memory for LLM Inference With Lower Latency and Higher Throughput (UC Berkeley)
Pooling CPU Memory for LLM Inference” was published by researchers at UC Berkeley. Abstract “The rapid growth of LLMs has ...
Semiconductor Engineering6d
Monitor Etch Defects on Dies in the Outer Regions Of The Wafer Using ISR
A technical paper titled “Detection of defective chips from nanostructures with a high-aspect ratio using hyperspectral ...
Semiconductor Engineering6d
Critical Design Considerations For High-Bandwidth Chiplet Interconnects (TSMC)
Bandwidth Chiplet Interconnects for Advanced Packaging Technologies in AI/ML Applications: Challenges and Solutions” was ...
Semiconductor Engineering7d
Top-Down Vs. Bottom-Up Chiplet Design
Chiplets are gaining widespread attention across the semiconductor industry, but for this approach to really take off commercially it will require more standards, better modeling technologies and ...
Semiconductor Engineering7d
Slow Progress On Generative EDA
Progress is being made in generative EDA, but the lack of training data remains the biggest problem. Some areas are finding ways around this. Generative AI, driven by large language models (LLMs), ...
Semiconductor Engineering4d
Chip Industry Week In Review
The chip industry is still on track to hit $1 trillion annually by 2030, according to PWC‘s new State of the Semiconductor Industry report. Key drivers for growth are electrification, digitization, ...